PUBLICATIONS

Workshop Contributions

This section includes contributions presented at specialized workshops. These settings allow us to explore new research directions, present early-stage ideas, and collaborate with fellow researchers in a dynamic and interdisciplinary environment.

V. Muttillo, V. Stoico, G. Valente, M. Santic, L. Pomante, and D. Frigioni. “System-Level Timing Performance Estimation Based on a Unifying HW/SW Performance Metric.” Open Access Series in Informatics (OASIcs), vol. 127, 2025, pp. 3:1–3:14. Presented at the 16th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 14th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2025). doi: 10.4230/OASIcs.PARMA-DITAM.2025.3.

L. Fazzini, G. Valente, F. Federici, and T. Di Mascio. “Enabling Multi-Context Execution in Machine-Mode on a RISC-V Processor.” RISC-V Summit Europe 2024, Munich, 2024.

M. Calvano, F. Caruso, A. Curci, A. Piccinno, and V. Rossano. “A Rapid Review on Cybersecurity Education: Are ‘Serious’ and Gaming Aspects Well Balanced?” In: Proceedings of the 1st International Workshop on CyberSecurity Education for Industry and Academia (CSE4IA2023) – CEUR Workshop Proceedings, vol. 3408, 2023.
D. Cassioli, A. Di Marco, T. Di Mascio, L. Tarantino, and P. Inverardi. “Is Really IoT Technology Gender Neutral?” In: Proceedings of the 2020 IEEE International Workshop on Metrology for Industry 4.0 and IoT (MetroInd 4.0 and IoT), 2020, pp. 324–328. doi: 10.1109/MetroInd4.0IoT48571.2020.9138201
S. Costantini, G. De Gasperis, T. Di Mascio, P. Migliarini, and A. Salutari. “Proposal of an Empathic Multi-Agent Robot Design Based on Theory of Mind.” In: CEUR Workshop Proceedings, vol. 2696, 2020, pp. 16–17.
V. Muttillo, P. Giammatteo, G. Fiorilli, and L. Pomante. “An OpenMP Parallel Genetic Algorithm for Design Space Exploration of Heterogeneous Multi-Processor Embedded Systems.” In: Proceedings of the 11th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures / 9th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM’2020). Association for Computing Machinery, New York, NY, USA, Article 4, pp. 1–6. doi: 10.1145/3381427.3381431.
M. Muttillo, V. Muttillo, and T. De Rubeis. “Towards the Design of Microcontroller-Based Embedded Sensory Systems with a Five-Parameter Single Diode Estimation Method for Photovoltaic Panels.” In: Proceedings of the 2020 IEEE International Workshop on Metrology for Industry 4.0 & IoT, Rome, Italy, 2020, pp. 197–201. doi: 10.1109/MetroInd4.0IoT48571.2020.9138311.
M. Muttillo, V. Muttillo, L. Pomante, and L. Pantoli. “A Low Cost and Flexible Power Line Communication Sensory System for Home Automation.” In: Proceedings of the 2020 IEEE International Workshop on Metrology for Industry 4.0 & IoT, Rome, Italy, 2020, pp. 191–196. doi: 10.1109/MetroInd4.0IoT48571.2020.9138191.
V. Muttillo, G. Valente, D. Ciambrone, V. Stoico, and L. Pomante. “HEPSYCODE-RT: A Real-Time Extension for an ESL HW/SW Co-Design Methodology.” In: Proceedings of the RAPIDO’18 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO ’18). Association for Computing Machinery, 2018, pp. 6:1–6:6. doi: 10.1145/3180665.3180670.
V. Muttillo, G. Valente, and L. Pomante. “Criticality-Driven Design Space Exploration for Mixed-Criticality Heterogeneous Parallel Embedded Systems.” In: Proceedings of the 9th Workshop and 7th Workshop on Parallel Programming and Runtime Management Techniques for Manycore Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM ’18). Association for Computing Machinery, 2018, pp. 63–68. doi: 10.1145/3183767.3183782.
G. Valente. “A HW/SW Unified Approach for Embedded Systems Monitoring.” In: Presentation at 3rd Italian Workshop on Embedded Systems (IWES), 2018.
G. Valente. “An EDA Framework to Support Monitoring Actions on Embedded Systems.” In: Presentation at 1st Italian Workshop on Embedded Systems (IWES), 2016.
A. Moro, F. Federici, G. Valente, L. Pomante, M. Faccio, and V. Muttillo. “Hardware Performance Sniffers for Embedded Systems Profiling.” In: Proceedings of the 12th International Workshop on Intelligent Solutions in Embedded Systems (WISES), 2015, pp. 29–34.
T. Di Mascio, R. Gennari, A. Melonio, and P. Vittorini. “Play and Learn about Your Learners to Early Form Your TEL Design.” In: CEUR Workshop Proceedings, vol. 1147, 2013.
P. Vittorini, R. Gennari, I. Marenzi, T. Di Mascio, and F. De la Prieta. “2nd International Workshop on Evidence-Based Technology Enhanced Learning.” Advances in Intelligent Systems and Computing, vol. 218, 2013.
F. De La Prieta, T. Di Mascio, R. Gennari, I. Marenzi, and P. Vittorini. “The TERENCE Smart Games: Automatic Generation and Supporting Architecture.” In: Proceedings of the CEUR Workshop, vol. 898, 2012, pp. 31–40.
F. De La Prieta, T. Di Mascio, R. Gennari, I. Marenzi, and P. Vittorini. “Playing for Improving the Reading Comprehension Skills of Primary School Poor Comprehenders.” In: CEUR Workshop Proceedings, vol. 898, 2012, pp. 41–50.
T. Di Mascio, R. Gennari, and P. Vittorini. “TERENCE: An Adaptive Learning System for Reasoning about Stories with Poor Comprehenders and Their Educators.” In: CEUR Workshop Proceedings, vol. 810, 2011, pp. 365–369.
A. De Nicola, T. Di Mascio, M. Lezoche, and F. Taglino. “Semantic Lifting of Business Process Models.” In: Proceedings – IEEE International Enterprise Distributed Object Computing Workshop, EDOC, 2008, pp. 120–126. doi: 10.1109/EDOCW.2008.55.
G. Marcelli, T. Di Mascio, and F. D’Antonio. “MDSS: A Framework for the Integration of Ontology Mapping Tools.” In: CEUR Workshop Proceedings, vol. 201, 2006.
T. Di Mascio, M. Francesconi, D. Frigioni, and L. Tarantino. “Tuning a CBIR System for Vector Images: The Interface Support.” In: Proceedings of the Workshop on Advanced Visual Interfaces AVI, 2004, pp. 425–428. doi: 10.1145/989863.989942.

Workshop Contributions

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